The present invention generally relates to wireless communication systems, and, more particularly to a radio frequency (RF) transceiver for a wireless communication system.
RF transceivers are widely used for transmitting RF signals in wireless communication systems. An RF transceiver modulates a carrier wave by changing at least one of the characteristics of the carrier wave, viz. amplitude, frequency and phase based on an RF signal and transmits the RF signal using the carrier wave over the air. However, for effective transmission medium bandwidth utilization, the RF transceivers use advanced modulation techniques, which results in transmission of more data over the transmission medium. Thus, for efficient transmission and bandwidth utilization, the RF signal is divided into in-phase and quadrature-phase (I/Q) components that are transmitted by way of I and Q channels or transmission paths.
To overcome attenuation of the carrier wave, the RF transceiver includes a power amplifier for amplifying the RF signal prior to transmission. An ideal power amplifier has linear characteristics. However, actual power amplifiers exhibit linear characteristics only for a small fraction of their maximum output capacity. Thus, most of the time the power amplifier generates a distorted RF signal.
To compensate for the non-linear characteristics of the power amplifier, the RF transceiver includes a digital pre-distortion (DPD) unit that receives and pre-distorts digital I and Q signals to counter-balance the distortion generated by the power amplifier. Subsequent to pre-distortion, the DPD unit transmits the pre-distorted digital I and Q signals to the power amplifier.
FIG. 1 is a schematic block diagram of a conventional RF transceiver 100. The RF transceiver 100 includes a baseband processor 102, a DPD unit 104, a quadrature amplitude (QA) modulator 106, a power amplifier 108, an antenna 110, a QA demodulator 112, and a DPD controller 114.
The processor 102 receives a baseband signal (referred to as “VBASEBAND” in FIG. 1) from a Layer 2 processor (not shown) and generates digital I and Q signals (referred to as “VDIGITAL—I” and “VDIGITAL—Q”, respectively, in FIG. 1) corresponding to the baseband signal for I and Q channels, respectively.
The DPD unit 104 is connected to the processor 102 for receiving the digital I and Q signals and pre-distorting the digital I and Q signals to counterbalance the distortion introduced by the power amplifier 108 based on a set of coefficients stored in a lookup table (LUT, not shown), and generating pre-distorted digital I and Q signals (referred to as “VPRE-DISTORTED—I” and “VPRE-DISTORTED—Q”, respectively, in FIG. 1) for the I and Q channels, respectively.
The QA modulator 106 is connected to the DPD unit 104 for receiving the pre-distorted digital I and Q signals, converting the pre-distorted digital I and Q signals into analog I and Q signals, modulating the analog I and Q signals, and generating a modulated signal (referred to as “VMODULATED” in FIG. 1) for amplification.
The power amplifier 108 is connected to the QA modulator 106 for receiving the modulated signal and outputting an amplified modulated signal (referred to as “VAMP—MODULATED” in FIG. 1) for transmission by way of the antenna 110.
The QA demodulator 112 is connected to the antenna 110 for receiving the amplified modulated signal indicative of analog I and Q feedback signals, converting the amplified modulated signal into digital I and Q feedback signals (referred to as “VFEEDBACK—I” and “VFEEDBACK—Q”, respectively, in FIG. 1), and outputting the digital I and Q feedback signals.
The DPD controller 114 is connected to the QA demodulator 112 for receiving the digital I and Q feedback signals and the processor 102 for receiving digital I and Q signals, and generating a control signal for updating the set of coefficients in the LUT.
Various parameters such as resistance and capacitance values of the analog components such as filters and mixers in the I and Q channels vary with time and temperature within the tolerance limit. The variation in the parameters of the analog components in the I and Q channels introduce I/Q impairments. The I/Q impairments include voltage offsets (DC offsets), differential gain characteristics between the I and Q channels, and differential phase characteristic between the I and Q channels. Thus I/Q impairments degrade the orthogonal relation between the digital I and Q signals. The DPD unit 104 compensates for the non-linear characteristics of the power amplifier 108, but the performance of the DPD unit 104 is decreased due to the I/Q impairments. To compensate for the I/Q impairments, the complexity of the DPD unit 104 and the DPD controller 114 increases.
One known technique to overcome the aforementioned problem uses a pre-correction unit for compensating for the DC offsets, and differential gain and phase characteristics, and other I/Q impairments between the I and Q channels.
FIG. 2 is a schematic block diagram of a conventional pre-correction unit 200 in an RF transceiver (not shown). The pre-correction unit 200 is connected between a DPD unit and a power amplifier for receiving pre-distorted digital I and Q signals (referred to as “VPRE-DISTORTED—I” and “VPRE-DISTORTED—Q”, respectively, in FIG. 2), generating a pre-corrected digital I signal (referred to as “VPRE-CORRECTED—I” in FIG. 2), and providing the pre-corrected digital I signal and the pre-distorted digital Q signal to a QA modulator (not shown) for modulation. The QA modulator generates and provides a modulated signal to the power amplifier based on the pre-corrected digital I signal and the pre-distorted digital Q signal. The pre-correction unit 200 includes first and second finite impulse response (FIR) filters 202 and 204 and an adder 206. The first FIR filter 202 receives the pre-distorted digital I signal and generates a first intermediate output signal (referred to as “VINT—OUT—1” in FIG. 2). The second FIR filter 204 receives the pre-distorted digital Q signal and generates a second intermediate output signal (referred to as “VINT—OUT—2” in FIG. 2). The adder 206 is connected to the first and second FIR filters 202 and 204 for receiving the first and second intermediate output signals, respectively, and generating the pre-corrected digital I signal for the I channel. A controller unit (not shown) generates a control signal for the pre-correction unit 200 for controlling and updating filter tap coefficients of the first and second FIR filters 202 and 204 based on a comparison between the pre-distorted digital I and Q signals received from the DPD unit and digital I and Q feedback signals received from a QA demodulator (not shown). Thus, the I/Q impairments between the I channel and the Q channel are controlled by updating the filter tap coefficients of the first and second FIR filters 202 and 204.
The pre-correction unit 200 reduces the I/Q impairments between the I and Q channels by filtering the pre-distorted digital I and Q signals and provides compensation only for the I channel. Thus, the pre-correction unit 200 reduces the I/Q impairments only for the I channel. Thus, controllability over compensation of the I/Q impairments between the I and Q channels is limited to only the I channel, and hence, the controllability is reduced. Reduced controllability results in poor frequency selectivity leading to unsatisfactory compensation of the I/Q impairments. Further, the signal path between the QA modulator and the QA demodulator includes the power amplifier that has inherent non-linear characteristics, thereby resulting in gain and phase distortion of the frequency components of the modulated signal. Therefore, unwanted frequency components are introduced in the transmitted RF signal, thereby leading to intermodulation distortion.
Thus, as the compensation between the I and Q channels is limited to only the I channel and as the I/Q impairments are dependent on the frequencies of the pre-distorted digital I and Q signals, the pre-correction unit 200 requires more hardware to provide compensation. This increases complexity of the pre-correction unit 200. Reducing the complexity of the pre-correction unit 200 requires good quality hardware for the QA modulator and the QA demodulator, which in turn increases the cost of the RF transceiver. Furthermore, number of filter taps in the first and second FIR filters 202 and 204 are not programmable and thus, the compensation provided by the pre-correction unit 200 is not adjustable based on the I/Q impairments or the characteristics of the pre-distorted I and Q signals, i.e., the pre-correction unit 200 is not programmable as per user requirement.
Another technique for compensating for the I/Q impairments between the I and Q channels is to use a computing system such as a microprocessor that interfaces with the RF transceiver. The microprocessor is configured to process the digital I and Q signals and compute elements of a 2×2 matrix based on a correction algorithm. The computing system computes the elements of the 2×2 matrix by measuring the I/Q impairments as a function of frequency and characterization tones of the digital I and Q signals and provides analog I and Q signals to the RF transceiver for transmission. However, the technique does not enable execution of the correction algorithm in the time-domain, and hence, does not allow the I/Q impairment compensation in the time domain. Moreover, the technique does not provide a solution for effective area and power utilization of the RF transceiver.
Therefore, it would be advantageous to have a system that compensates for the I/Q impairments between the I and Q channels, provides better control over the I/Q impairments between the I and Q channels, reduces intermodulation distortion, and allows for an efficient hardware implementation for the I/Q impairment compensation.